The present invention relates, in general, to a nonvolatile semiconductor memory employing a ferroelectric material and, more particularly, to a ferroelectric memory which is capable of holding the newest information as the nonvolatile information and of realizing the high integration, the high reliability, and the high speed operation and of being handled in the same manner as a dynamic random access memory (DRAM).
A ferroelectric random access memory (hereinafter, referred to as "an FERAM" for short, when applicable) employing a ferroelectric material is a nonvolatile memory which operates to store the information therein on the basis of the polarization state of ferroelectric materials. However, in prior art ferroelectric memories, the polarization is switched in the operation of reading out the information as well as in the operation of writing the information, causing fatigue in a film made of a ferroelectric material. As a result, there arises a problem that the permitted number of accesses with respect to the rewrite and read of the information is remarkably limited as compared with dynamic random access memories (DRAMs) for example. In addition, there arises another problem that since the fixed period of time is required for the switch of the polarization, the operation time is necessarily delayed.
As for the method of solving the problems of the fatigue of the ferroelectric film and the reduction of the read speed which occur along with the switch of the polarization, the following method is proposed in JP-A-3-283176. That is, as shown in an array configuration of FIG. 2, in the normal operation, the electric potential on a plate line is made Vcc for example so that the FERAM is used as the DRAM, and before the power supply has been turned off, on the basis of the write operation by the FERAM, the information of interest is stored in the form of nonvolatile information. If the electric potential on the plate line is made Vcc, in the case where the electric potential at the storage node is either 0 V or Vcc, the polarization is not inverted at all. Therefore, the problem of the fatigue of the ferroelectric capacitor can be effectively prevented and also the reduction of the read speed does not occur. Next, when turning the power supply on, if the nonvolatile information is read out on the basis of the read operation by the FERAM, the FERAM can be substantially operated as a nonvolatile memory.
However, in the above-mentioned memory with both DRAM and FERAM modes, there arises still another problem that operation of converting the volatile information into the nonvolatile information is complicated. That is, it is necessary that with respect to all the memory cells, after the information is first read out on the basis of the operation by DRAMs, in correspondence to that information thus read out, that information is stored in the form of nonvolatile information on the basis of the FERAM operation. In particular, in the case where the power source assumes the off state due to unexpected trouble, it is very difficult to speedily complete the above-mentioned conversion operation. For the period of time when in the above-mentioned system, a ferroelectric memory is used as the DRAM, all the polarization of the ferroelectric material is arranged in one direction. Therefore, all the stored information is erased along with the unexpected off state of the power supply.